Associate Professor
Adhoc and Sensors Networks 120.2935
Electronics Circuits I 170.4617
ELECTRONIC CIRCUITS II 228.6974
Electronic Circuits II 202.3792
DIGITAL IMAGE PROCESSING 142.2742
DIGITAL IMAGE PROCESSING 158.0097
Micro Electronics and VLSI
Micro Electronics and VLSI
- Reduced Clock Allocation Network for On-Chip Compression Format in VLSI Design, Middle-East Journal of Scientific Research 23 (8): 1652-1655, 2015;ISSN 1990-9233,© IDOSI Publications, 2015.
- Health monitoring and alert systems using Internet of Things. Journal of Computational and Theoretical Nanoscience/American Scientific Publishers 17, Issue.4, pp.1896-1899
Presented a paper in “Misbehavior Detection Scheme in Delay Tolerant Networks “, in the International Conference on SENSING ,SIGNAL PROCESSING AND SECURITY
ADVANCE DRIVER ASSISTANT SYSTEM USING DIGITAL IMAGE PROCESSING
50% completed
- Saveetha Engineering College –Associate Professor – ECE Department (JUNE 2013-Till Date)\
- VELAMMAL INSTITUTE OF TECHNOLOGY–CHENNAI Assistant Professor (Visiting Faculty)-ECE Department(AUG 2010- April 2011)
- OMNEAGATE SYSTEMS PVT.LTD , Greams Road, Chennai.Research and Development Engineer(June 2011 –June 2013).
- Indian Institute of Information Technology Design and Manufacture (IIT Campus), Chennai. Technical Officer- ECE Department(Sep 2009 – April 2010)
- Fomra Institute of Technology, Chennai. Assistant Professor - ECE Department (Nov 2007 –AUG 2009)
- FDP on “ VLSI Design Tools , Techniques and Applications” , Organized by ELECTRONICS & ICT ACADAMY NIT WARANGAL during August 10-17,2020.
- Two weeks online course on MEMS organized by Saveetha Engineering college, During 22.06.2020 to 3.07.2020.
- FDP on MACHINE LEARNING TECHNIQUES organized by Saveetha Engineering college, During 13.07.2020 to 17.07.2020.
Institution of Electronics and Telecommunication Engineers (IETE) -M236689